Member of Technical Staff - Applied AI
Architect Labs · On-site
MeritLog read this listing from Architect Labs's Ashby job board and last checked it on September 27, 2026.
Source: the employer's Ashby job board. Open the job post for the latest details.
Job details
- Work model
- On-site
- Salary
- Not listed by source
- Location
- Palo Alto
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Job description
ABOUT ARCHITECT LABS Architect is a frontier AI lab for custom silicon. We partner with frontier labs, clouds / neoclouds, physical AI companies, and advanced fabs to tape-out custom chips co-designed for next-generation AI workloads. Our goal is to compress end-to-end software to silicon timelines, and maximize intelligence per watt and per dollar for the world. We are a small exceptional team across silicon, systems, software and frontier AI. Our team have led research teams at nearly every frontier AI lab, and at some of the most complex SoCs in the world. What You'll Do As a Member of the Technical Staff (Applied AI) at Architect, you'll sit at the intersection of chip design and frontier AI - translating deep hardware engineering expertise into agentic systems that can reason about, generate, and verify real silicon. - Design and build AI agents that tackle core chip-design tasks, grounding model behavior in how real hardware engineers actually work. - Own end-to-end agent workflows: scaffolding, tool use, evaluation harnesses, and the domain-specific infrastructure that makes agents useful on actual design problems. - Serve as the hardware conscience of the model - curating high-quality data, defining evaluation criteria, and encoding the engineering judgment that separates plausible outputs from correct ones. - Partner closely with the ML research, post-training, and infra teams to turn hardware domain expertise into reward signals, benchmarks, and training signal. - Move fast in a 0→1 environment: prototype, dogfood, break things, iterate. Translate ambiguous chip-design challenges into concrete agent capabilities that ship. What We'd Like to See Qualifications & Skills: - Degree: MS or PhD in Electrical Engineering, Computer Engineering, EECS, or a closely related field. - Hardware Background: Strong industry or research experience as an RTL design or Design Verification engineer, with a solid understanding of the modern chip design flow end to end. - Software Engineering: Excellent software engineering fundamentals - comfortable writing clean, production-grade Python or typescript, building tooling, and working in modern engineering environments. This is a non-negotiable bar. - Builder Mindset: Demonstrated ability to own ambiguous problems end to end, prototype quickly, and productionize what works. Pragmatic, not precious. - Curiosity for AI: Genuine excitement about applying frontier AI to hardware. No prior applied-AI or ML research background is required - we'll meet you where you are. Bonus: - Prior experience on AI-for-chip-design or AI4EDA efforts at Google, NVIDIA, or at chip / EDA companies. - Experience building, using, or evaluating LLM-based tooling for engineering workflows. - Publications or open-source contributions at the intersection of ML and EDA (DAC, ICCAD, DVCon, MLCAD, NeurIPS, ICLR, ICML). - Experience as an early engineer at a deeptech or AI startup. What We Offer - Competitive salary and meaningful equity stake - Fast-paced startup with autonomy and visible impact - Cutting-edge AI-driven chip design challenges
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