DV Intern
Etched · On-site
MeritLog read this listing from Etched's Ashby job board and last checked it on September 11, 2026.
Source: the employer's Ashby job board. Open the original listing for current details.
Job details
- Work model
- On-site
- Salary
- Not listed by source
- Location
- San Jose
Hiring context
How this role compares at Etched
Etched has 104 live roles in MeritLog’s catalog across 8 job families, and 3 of them are in design. 80 of those listings publish a pay range, a disclosure rate of 77%.
Etched concentrates this hiring in:
Counted across the job boards MeritLog tracks, at the time this page was served. Pay comparisons use only listings that publish a complete range in the same currency and period.
What the role asks for
What they're asking for
- Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.Education
- Familiarity with high-speed digital logicSkill
- Exposure to ASIC or SoC design conceptsSkill
- Familiarity with SystemVerilog, UVM, or PythonSkill
- Familiarity with verification work and writing test benchesSkill
- Familiarity with physical design flows and toolingSkill
- Are able to learn quickly about transformers and other aspects of modern artificial intelligenceSkill
- Familiarity with modern ML and LLM model architecturesSkill
- UVM or formal verification experienceSkill
- Ability to program with Python or another scripting languageSkill
- 12-week paid internshipSkill
- Generous housing support for those relocatingSkill
- Daily lunch and dinner in our officeSkill
- Based at our office in San Jose, CASkill
- Direct mentorship from industry leaders and world-class engineersSkill
- Opportunity to work on one of the most important problems of our timeSkill
Parsed by MeritLog from the employer’s own posting. The full description follows below.
Job description
About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary As a Design Verification intern, you will ensure the custom IPs powering our chips - including systolic arrays, DMA engines, and NoCs - are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have - Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field. - Familiarity with high-speed digital logic - Exposure to ASIC or SoC design concepts - Familiarity with SystemVerilog, UVM, or Python - Familiarity with verification work and writing test benches - Familiarity with physical design flows and tooling - Are able to learn quickly about transformers and other aspects of modern artificial intelligence Strong candidates may also have experience with - Familiarity with modern ML and LLM model architectures - UVM or formal verification experience - Ability to program with Python or another scripting language We encourage you to apply even if you do not believe you meet every single qualification. Program details - 12-week paid internship - Generous housing support for those relocating - Daily lunch and dinner in our office - Based at our office in San Jose, CA - Direct mentorship from industry leaders and world-class engineers - Opportunity to work on one of the most important problems of our time For any questions, contact internships@etched.com How we’re different Etched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors. We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.