Architecture Modeling Engineer

Job details

Work model

Hybrid

Salary

$120,000 – $225,000 per year

Location

Austin, TX; Palo Alto, CA

Hiring context

How this role compares at Mythic

Mythic has 32 live roles in MeritLog’s catalog across 6 job families, and 25 of them are in engineering. 18 of those listings publish a pay range, a disclosure rate of 56%.

This role's posted range of $120,000 – $225,000 per year sits above 0% of the 16 other Mythic roles quoted over the same currency and period.

Counted across the job boards MeritLog tracks, at the time this page was served. Pay comparisons use only listings that publish a complete range in the same currency and period.

Job description

We’re hiring experienced Architecture Modeling Engineers from junior to senior levels to play a key role in developing the designs that will bring our next-generation AI processors to life.   About Us: Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.   We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.   The salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.   Architecture Modeling at Mythic: At Mythic, architecture modeling is at the core of how we design and deliver breakthrough AI hardware. Our models allow us to quantify the real-world performance of new architectures-capturing critical tradeoffs in throughput, latency, and efficiency-before a single chip is built.   Modeling plays a central role in active design development, predicting how AI workloads generated by the Mythic compiler will run on silicon. These models serve as a golden reference for verifying RTL implementations and enable our software teams to begin developing validation and customer-facing code long before hardware is available.   Even after silicon arrives, our modeling tools remain invaluable, offering deeper insight into performance bottlenecks and guiding ongoing software optimization.