Analog and Mixed-Signal IC Design Engineer Intern
Neuralink · On-site
MeritLog read this listing from Neuralink's Greenhouse job board and last checked it on September 12, 2026.
Source: the employer's Greenhouse job board. Open the original listing for current details.
Job details
- Work model
- On-site
- Salary
- From $35 per hour
- Location
- South San Francisco, California, United States
Hiring context
How this role compares at Neuralink
Neuralink has 79 live roles in MeritLog’s catalog across 5 job families, and 50 of them are in engineering. 29 of those listings publish a pay range, a disclosure rate of 37%.
This role's posted range of From $35 per hour sits above 25% of the 28 other Neuralink roles quoted over the same currency and period.
Neuralink concentrates this hiring in:
Counted across the job boards MeritLog tracks, at the time this page was served. Pay comparisons use only listings that publish a complete range in the same currency and period.
What the role asks for
What they're asking for
- Skills in scripting and automation for complex simulation scenariosSkillPreferred
- Experience in lab testing of high-precision analog and mixed-signal ICsSkillPreferred
- Functional modeling experience and logic verification with Verilog AMS and SystemVerilogSkillPreferred
- Experience in design and layout with advanced CMOS FinFET technologiesSkillPreferred
- Experience with design for high-volume productionSkillPreferred
Parsed by MeritLog from the employer’s own posting. The full description follows below.
Job description
About Neuralink: We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world. Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future. To accelerate our pathway to human ready brain-computer interfaces, you will have the opportunity to partner with our electrical, microfabrication, chip designers, neuro and mechanical engineers. Job Responsibilities: We are looking for Analog and Mixed-Signal IC Design Engineer Interns who are interested in architecting and implementing innovative solutions with high energy-efficiency and compact silicon footprint and who thrive with the autonomy to propose creative approaches to problems. Neuralink strives to be, as much as possible, a meritocratic environment: we require honest and transparent communication to ensure the best ideas win out, and we believe the best solutions emerge and the best teams are created when you assemble high-performing individuals with different skill sets and perspectives, and allow them to engage in rigorous and thoughtful inquiry. We want to work with exceptional people, and, to the extent that you excel, we want you to take on more responsibility and help all of us succeed. If this speaks to you, come join us. The Analog and Mixed-Signal IC Design Engineer Intern will be responsible for analog and mixed-signal chip design, from circuit design to layout and verification. • Define and implement innovative and optimal analog and mixed signal circuit architectures and transistor-level circuit solutions to achieve a variety of challenging noise, mismatch, distortion, power consumption, and cost requirements • Defines verification plan for a portion of IP or chip and runs complex simulations and analyses (e.g., power, performance, linearity, yield) on designs • Designs, programs, and runs complex tests and reviews tests of other team members; ensures bugs and other issues are identified and appropriately analyzed Key Qualifications: • Minimum 1 years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, Audio CODEC and Class D audio amplifier, high speed PHY & SERDES) with a successful track record of silicon validation • Minimum 3 months experience of application of technical skills outside of the classroom (examples: laboratory, research, extracurricular project teams, open source contributions, volunteering, personal projects or prior internship/work experience) • The ideal candidates are people who get excited about building things, are highly analytical, and enjoy tackling new problems regularly Preferred Qualifications: • Skills in scripting and automation for complex simulation scenarios • Experience in lab testing of high-precision analog and mixed-signal ICs • Functional modeling experience and logic verification with Verilog AMS and SystemVerilog • Experience in design and layout with advanced CMOS FinFET technologies • Experience with design for high-volume production Pay Transparency: Based on California law, the following details are for California individuals only: California Hourly Rate: $35/hr USD What We Offer: Full-time employees are eligible for the following benefits listed below. • An opportunity to change the world and work with some of the smartest and most talented experts from different fields • Growth potential; we rapidly advance team members who have an outsized impact • Excellent medical, dental, and vision insurance through a PPO plan • Paid holidays • Commuter benefits • Meals provided • Equity (RSUs) *Temporary Employees & Interns excluded • 401(k) plan *Interns initially excluded until they work 1,000 hours • Parental leave *Temporary Employees & Interns excluded • Flexible time off *Temporary Employees & Interns excluded
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